Name
Abstract | ||
|---|---|---|
This paper presents a new autozeroing technique that combines very high speed operation, low power consumption and low input switching interferences. This technique has been applied to the design and implementation of a 6-bit 0.13@mm CMOS flash Analog-to-Digital converter for Ultra-Wide Band applications. Simulation results show 5.76-bit at 1GS/s with a power consumption of only 182mW, validated with experimental measurements carried out with 3-bit circuit tiles of the 6-bit flash A/D converter. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1016/j.vlsi.2013.06.002 | Integration |
Keywords | Field | DocType |
ultra-wide band application,low input,analog-to-digital converter,3-bit circuit tile,low power consumption,experimental measurement,power consumption,new autozeroing technique,d converter,flash analog-to-digital converter,6-bit flash,cmos,ultra wide band | Computer science,To digital converter,CMOS,Electronic engineering,Ultra-wideband,Electrical engineering,Analog to digital conversion,Power consumption | Journal |
Volume | Issue | ISSN |
47 | 1 | 0167-9260 |
Citations | PageRank | References |
1 | 0.37 | 8 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fernando J. Marquez | 1 | 1 | 1.72 |
| F. Muñoz | 2 | 1 | 0.71 |
| Ramón González Carvajal | 3 | 681 | 153.63 |
| J. R. García-Oya | 4 | 1 | 0.71 |
| E. López-Morillo | 5 | 1 | 0.71 |
| A. Torralba | 6 | 252 | 51.83 |
| J. Galán | 7 | 1 | 0.37 |