Name
Abstract | ||
|---|---|---|
A tool for the synthesis of fuzzy controllers is presented in this paper. This tool takes as input the behavioral specification of a controller and generates its VHDL description according to a target architecture. The VHDL code can be synthesized by means of two implementation methodologies, ASIC and FPGA. The main advantages of using this approach are rapid prototyping, and the use of well-known commercial design environments like Synopsys, Mentor Graphics, or Cadence. |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1109/DATE.1998.655843 | DATE |
Keywords | Field | DocType |
behavioral specification,fuzzy controller,vhdl description,well-known commercial design environment,main advantage,vhdl code,target architecture,fuzzy logic controller,mentor graphics,implementation methodology,rapid prototyping,fuzzy control,traffic shaping,fuzzy logic,atm,fpga prototyping,arithmetic,cad,field programmable gate arrays,application specific integrated circuits,integrated circuit design,space technology,circuits,hardware,read only memory,logic design | Logic synthesis,Computer architecture,Computer science,Fuzzy logic,FPGA prototype,Field-programmable gate array,Application-specific integrated circuit,Integrated circuit design,VHDL,Fuzzy control system,Embedded system | Conference |
ISBN | Citations | PageRank |
0-8186-8359-7 | 8 | 1.77 |
References | Authors | |
6 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| E. Lago | 1 | 8 | 1.77 |
| C. J. Jiménez | 2 | 30 | 5.48 |
| D. R. López | 3 | 8 | 1.77 |
| S. Sánchez-Solano | 4 | 79 | 9.82 |
| A. Barriga | 5 | 73 | 9.85 |