Title
Generating and Searching Families of FFT Algorithms.
Abstract
A fundamental question of longstanding theoretical interest is to prove the lowest exact count of real additions and multiplications required to compute a power-of-two discrete Fourier transform (DFT). For 35 years the split-radix algorithm held the record by requiring just 4n log n - 6n + 8 arithmetic operations on real numbers for a size-n DFT, and was widely believed to be the best possible. Recent work by Van Buskirk et al. demonstrated improvements to the split-radix operation count by using multiplier coefficients or "twiddle factors" that are not n-th roots of unity for a size-n DFT. This paper presents a Boolean Satisfiability-based proof of the lowest operation count for certain classes of DFT algorithms. First, we present a novel way to choose new yet valid twiddle factors for the nodes in flowgraphs generated by common power-of-two fast Fourier transform algorithms, FFTs. With this new technique, we can generate a large family of FFTs realizable by a fixed flowgraph. This solution space of FFTs is cast as a Boolean Satisfiability problem, and a modern Satisfiability Modulo Theory solver is applied to search for FFTs requiring the fewest arithmetic operations. Surprisingly, we find that there are FFTs requiring fewer operations than the split-radix even when all twiddle factors are n-th roots of unity.
Year
Venue
Keywords
2011
Clinical Orthopaedics and Related Research
discrete fourier transform,boolean satisfiability,symbolic computation,satisfiability modulo theories,information theory,fast fourier transform,roots of unity
DocType
Volume
Issue
Journal
7
4
ISSN
Citations 
PageRank 
Journal on Satisfiability, Boolean Modeling and Computation, 7:145-187, 2011
2
0.45
References 
Authors
25
2
Name
Order
Citations
PageRank
Steve Haynal1323.59
Heidi Haynal220.45