Name
Abstract | ||
|---|---|---|
This paper presents an approach for verifying the temporal scheduling of behavioral models of VHDL. The aim is to verifi that the controljlow of a behavioral description satisfies its behavioral specifications described in a formalism based on reified temporal logics and on a notion of physical activity. |
Year | DOI | Venue |
|---|---|---|
1992 | 10.1109/EURDAC.1992.246188 | EURO-DAC '92 Proceedings of the conference on European design automation |
Keywords | Field | DocType |
temporal verification,behavioral description,strategic planning,data mining,vhdl,control flow,temporal logic,physical activity,behavior modeling,very large scale integration,pressing,satisfiability,formal verification | Programming language,Interval temporal logic,Scheduling (computing),Intelligent verification,Computer science,Control flow,Theoretical computer science,VHDL,Formalism (philosophy),Temporal logic,Formal verification | Conference |
ISBN | Citations | PageRank |
0-8186-2780-8 | 3 | 0.47 |
References | Authors | |
9 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Djamel Boussebha | 1 | 3 | 0.47 |
| Norbert Giambiasi | 2 | 227 | 37.59 |
| Janine Magnier | 3 | 7 | 2.51 |