Name
Abstract | ||
|---|---|---|
In this paper, an efficient mode decision algorithm and a high throughput hardware architecture with eight-pixel parallelism for improving the H.264/advanced video coding intra coding efficiency are proposed. Based on the inherent features of the discrete cosine transform, the input block is first transformed and then analyzed to determine its texture directional tendency. A few candidate modes are chosen for cost calculation, which adopts the error model in the sum of absolute integer-transformed differences (SAITD). Experimental results show that the proposed intra prediction algorithm has lower peak signal-to-noise ratio degradation and bit-rate increment compared to other recent designs. Using the SAITD technique, the proposed mode decision algorithm is effectively integrated into intra prediction rather than being a preprocessing unit. For hardware implementation, the proposed intra prediction algorithm in the macroblock level is implemented for prediction computation, mode decision, and reconstruction loop units. The synthesis results show that the proposed architecture can achieve a 100 MHz operation frequency, allowing it to easily support the real-time requirements for video resolutions of up to the 16 source input format. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/TCSVT.2010.2046059 | IEEE Trans. Circuits Syst. Video Techn. |
Keywords | Field | DocType |
prediction computation,absolute integer-transformed differences,transform-based intra prediction,efficient mode decision algorithm,mode decision,discrete cosine transform,vlsi architecture,proposed architecture,proposed mode decision algorithm,discrete cosine transforms,vlsi,intra prediction,video coding,candidate mode,transform-based,dct,texture directional tendency,efficient vlsi architecture,mode decision algorithm,h264/advanced video coding (avc),proposed intra prediction algorithm,image texture,intra coding efficiency,eight-pixel parallelism,saitd technique,reconstruction loop units,frequency 100 mhz,h.264-advanced video coding intra coding efficiency,high throughput,throughput,hardware,parallel processing,psnr,prediction algorithms,real time,hardware architecture,very large scale integration,peak signal to noise ratio | Signal processing,Computer science,Discrete cosine transform,Real-time computing,Artificial intelligence,Very-large-scale integration,Macroblock,Algorithmic efficiency,Pattern recognition,Image texture,Signal-to-noise ratio,Algorithm,Hardware architecture | Journal |
Volume | Issue | ISSN |
20 | 6 | 1051-8215 |
Citations | PageRank | References |
22 | 1.16 | 12 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Heng-yao Lin | 1 | 67 | 5.96 |
| Kuan-Hsien Wu | 2 | 22 | 1.16 |
| Bin-da Liu | 3 | 563 | 66.56 |
| Jar-Ferr Yang | 4 | 1115 | 142.85 |