Name
Abstract | ||
|---|---|---|
In complex System-on-a-Chip (SoC) designs, designers often need to add new features into an original processor core, such as to extend the exception handling mechanism to consider exceptions in the remaining portion of the SoC design. We present in this paper a scalable architecture that can be used to add complex exception handling mechanisms in processor cores and how it can be used to extend the fixed set of exceptions found in microprocessor cores. This mechanism is based on the use of assertion libraries linked by an assertion processor to incorporate these new functionalities. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1145/1016568.1016590 | SBCCI |
Keywords | Field | DocType |
original processor core,assertion library,processor core,complex exception handling mechanism,assertion processor,complex system-on-a-chip,new feature,new functionalities,soc design,exception handling mechanism,exception handling,integrated circuit design,system on chip,chip,complex system | System on a chip,Scalable architecture,Programming language,Computer science,Assertion,Exception handling,Microprocessor,Integrated circuit design,Multi-core processor,Operating system | Conference |
ISBN | Citations | PageRank |
1-58113-947-0 | 3 | 0.44 |
References | Authors | |
3 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fernando Cortez Sica | 1 | 3 | 0.44 |
| Claudionor N. Coelho, Jr. | 2 | 54 | 5.99 |
| José Augusto M. Nacif | 3 | 3 | 0.44 |
| Harry Foster | 4 | 98 | 9.24 |
| Antônio Otávio Fernandes | 5 | 27 | 5.92 |