Title
A quadrature relaxation oscillator-mixer in CMOS
Abstract
This paper describes the design of a quadrature cross-coupled oscillator circuit integrated which also realizes the mixer function in a phase lock loop (PLL). This should be able to provide a very accurate phase relation (<1°). This combined oscillator/mixer is first evaluated using a high-level model, in up and downconverter configurations. A circuit implementation is then carried out, in which all the variables are kept independent at circuit level, ensuring a practical implementation close to that of the high-level model. The circuit is designed in a standard 0.35 μm CMOS technology with an oscillation frequency of 900 MHz, it has an overall area of 521 × 515 μm2 (157 × 119 μm2 for the IQ oscillator/mixer circuit) and a power consumption of 70 mW with a 3 V power supply. The circuit performance is evaluated by simulation.
Year
DOI
Venue
2003
10.1109/ISCAS.2003.1205657
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium
Keywords
Field
DocType
CMOS analogue integrated circuits,UHF integrated circuits,UHF mixers,UHF oscillators,integrated circuit design,phase locked loops,relaxation oscillators,0.35 micron,3 V,70 mW,900 MHz,CMOS technology,PLL,downconverter configuration,high-level model,phase lock loop,quadrature cross-coupled oscillator circuit,quadrature relaxation oscillator-mixer,upconverter configuration
Phase-locked loop,Oscillation,Relaxation oscillator,Computer science,CMOS,Electronic engineering,Integrated circuit design,Heterodyne,Quadrature (mathematics),Electrical engineering,Power consumption
Conference
Volume
ISBN
Citations 
1
0-7803-7761-3
2
PageRank 
References 
Authors
1.07
1
6