Name
Abstract | ||
|---|---|---|
A bagging ensemble consists of a set of classifiers trained independently and combined by a majority vote. Such a combination improves generalization performance but can require large amounts of memory and computation, a serious drawback for addressing portable real-time pattern recognition applications. We report here a compact three-dimensional (3D) multiprecision very large-scale integration (VLSI) implementation of a bagging ensemble. In our circuit, individual classifiers are decision trees implemented as threshold networks - one layer of threshold logic units (TLUs) followed by combinatorial logic functions. The hardware was fabricated using 0.7-/spl mu/m CMOS technology and packaged using MCM-V micro-packaging technology. The 3D chip implements up to 192 TLUs operating at a speed of up to 48 GCPPS and implemented in a volume of (/spl omega/ /spl times/ L /spl times/ h) = (2 /spl times/ 2 /spl times/ 0.7) cm/sup 3/. The 3D circuit features a high level of programmability and flexibility offering the possibility to make an efficient use of the hardware resources in order to reduce the power consumption. Successful operation of the 3D chip for various precisions and ensemble sizes is demonstrated through an electronic nose application. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/TNN.2003.816362 | IEEE Transactions on Neural Networks |
Keywords | Field | DocType |
tlus operating,hardware resource,ensemble size,mcm-v micro-packaging technology,threshold logic unit,threshold network,combinatorial logic function,bagging threshold network ensemble,m cmos technology,vlsi classifier,decision tree,bagging ensemble,pattern recognition,cmos integrated circuits,majority voting,vlsi,bagging,decision trees,real time,logic circuits,electronic nose,chip,indexing terms,three dimensional | Decision tree,Logic gate,Computer science,CMOS,Combinational logic,Three-dimensional integrated circuit,Artificial intelligence,Classifier (linguistics),Very-large-scale integration,Machine learning,Computation | Journal |
Volume | Issue | ISSN |
14 | 5 | 1045-9227 |
Citations | PageRank | References |
20 | 1.08 | 18 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| A. Bermak | 1 | 35 | 4.72 |
| D. Martinez | 2 | 20 | 1.08 |