Name
Abstract | ||
|---|---|---|
Most power reduction techniques have focused on gating the clock to unused functional units to minimize static power consumption, while system level optimizations have been used to deal with dynamic power consumption. Once these techniques are applied, register file power consumption becomes a dominant factor in the processor. This paper proposes a power-aware reconfiguration mechanism in the register file driven by a compiler. Optimal usage of the register file in terms of size is achieved and unused registers are put into a low-power state. Total energy consumption in the register file is reduced by 65% with no appreciable performance penalty for MiBench benchmarks on an embedded processor. The effect of reconfiguration granularity on energy savings is also analyzed, and the compiler approach to optimize energy results is presented. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1023/B:IJPP.0000004510.66751.2e | International Journal of Parallel Programming |
Keywords | Field | DocType |
functional unit,embedded processor,compiler optimization,register file | Register allocation,Computer science,Parallel computing,Stack register,Control register,Register file,Compiler,Dynamic demand,Processor register,Energy consumption | Journal |
Volume | Issue | ISSN |
31 | 6 | 1573-7640 |
Citations | PageRank | References |
28 | 1.12 | 15 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| José L. Ayala | 1 | 180 | 20.44 |
| Alexander V. Veidenbaum | 2 | 757 | 78.24 |
| Marisa López-Vallejo | 3 | 145 | 20.48 |