Title
High-Throughput VLSI Architecture for FFT Computation
Abstract
In this brief, multi-path delay commutator structures are utilized to improve the throughput rate of radix-2 and radix-4 FFT computation by a factor of 2 to 4. Latency can also be reduced by a factor of 2 to 3. Compared with previous radix-2 and radix-4 FFT structures, the proposed high-throughput FFT with doubled throughput rate requires similar or even less hardware cost. Although split radix FF...
Year
DOI
Venue
2007
10.1109/TCSII.2007.901635
IEEE Transactions on Circuits and Systems II: Express Briefs
Keywords
Field
DocType
Very large scale integration,Computer architecture,Delay,Hardware,Throughput,Chaos,Discrete Fourier transforms,Matrix decomposition,Fourier transforms,Tensile stress
Throughput (business),Split-radix FFT algorithm,Computer science,Prime-factor FFT algorithm,Parallel computing,Electronic engineering,Radix,Fast Fourier transform,Throughput,Very-large-scale integration,Computation
Journal
Volume
Issue
ISSN
54
10
1549-7747
Citations 
PageRank 
References 
25
2.03
3
Authors
2
Name
Order
Citations
PageRank
C. Cheng1886.29
keshab k parhi23235369.07