Paper Info
Title
HdSC: a fast and preemptive modeling for on host HdS development
Abstract
Abstract In modern embedded systems, the Hardware-dependent Software (HdS) plays a critical role due to its increasing complexity and development cost. To support HdS development starting in an initial system design phase, fast and accurate preemptive processor models should be provided for simulating the software using register level interface on the host machine environment. This paper presents a strategy for target processor modeling that enables HdS development using native tools running in the host machine. Our approach supports the specification of platform components such as bus data and interruption interfaces and platform specification features, which provides a fast and accurate modeling mechanism. A technique for instruction count estimates is being proposed, which is very accurate and supports the development of driver code plus interruption service routines at a very early design phase. Results demonstrate that a virtual platform specified using the proposed approach can perform fast and accurate software simulation running on host machine, without the need of ISS processor models. The experiments performed validate the proposed approach by showing its efficiency with about three orders of magnitude simulation speed up, including the Dhrystone benchmark in order to assess performance evaluation estimation.
Year
DOI
Venue
2011
10.1145/2020876.2020917
SBCCI
Keywords
DocType
Citations 
accurate modeling mechanism,preemptive modeling,accurate software simulation,hds development,accurate preemptive processor model,iss processor model,host machine,host hds development,development cost,host machine environment,platform component,modeling,embedded software,system design,embedded system,simulation
Conference
0
PageRank 
References 
Authors
0.34
13
4
Name
Order
Citations
PageRank
Bruno Prado171.57
Edna Barros200.34
Thiago Figueiredo300.34
André Aziz400.34