Name
Abstract | ||
|---|---|---|
To address the growing I/O bottleneck, next-generation distributed I/O architectures employ scalable point-to-point interconnects and minimize operating system overhead by providing user-level access to the I/O subsystem. Reduced I/O overhead allows I/O intensive applications to efficiently employ latency hiding techniques for improved throughput. This paper presents the design of a novel scalable user-level I/O architecture and evaluates the impact of various architectural mechanisms in terms of overall performance improvement. Results demonstrate that eliminating data movement across protection domains is the dominant contributor to improved scalability. Eliminating system call and interrupt overhead only has a small additional benefit that may not justify the additional hardware support required. While this evaluation is based on one specific design, the conclusions can be generalized to other user-level I/O architectures. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/TC.2006.122 | IEEE Trans. Computers |
Keywords | Field | DocType |
o overhead,user-level access,o bottleneck,o architecture,o subsystem,o intensive application,interrupt overhead,additional hardware support,system overhead,design trade-offs,o architectures,novel scalable user-level,input output devices,simulation,indexing terms,input output,point to point,architecture | Interrupt,Bottleneck,Computer science,Parallel computing,Input/output,Real-time computing,System call,Throughput,Memory architecture,Scalability,Performance improvement,Embedded system | Journal |
Volume | Issue | ISSN |
55 | 8 | 0018-9340 |
Citations | PageRank | References |
6 | 0.59 | 10 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Lambert Schaelicke | 1 | 279 | 20.23 |
| Alan L. Davis | 2 | 45 | 11.74 |