Paper Info
Title
A hardware/software codesign of a co-processor for real-time hyperelliptic curve cryptography on a Spartan3 FPGA
Abstract
This paper describes the acceleration of calculations for public-key cryptography on hyperelliptic curves on very small FPGAs. This is achieved by using a Hardware/Software Codesign Approach starting with an all-software implementation on an embedded Microprocessor and migrating very time-consuming calculations from software to hardware. Basic GF(2n)-hardware extensions are connected to work in conjunction with the Microprocessor and possible alternatives for connecting external hardware to the Microprocessor are investigated. The performance of the hardware implementations compared to their counterparts as a software approach are evaluated. Based on these results, a coprocessor is devised and optimized for performance. The system utilizes minimal resources and fits easily on a small FPGA. It allows for fast Hyperelliptic Curve Cryptography (HECC) operations while running at a very low clock speed of 33 MHz, thus making it suitable for usage in embedded systems.
Year
DOI
Venue
2008
10.1007/978-3-540-78153-0_15
ARCS
Keywords
Field
DocType
hardware extension,spartan3 fpga,software codesign approach,small fpgas,all-software implementation,small fpga,real-time hyperelliptic curve cryptography,embedded microprocessor,basic gf,software approach,software codesign,external hardware,embedded system,hyperelliptic curve,public key cryptography,real time
Computer science,Cryptography,Parallel computing,Microprocessor,Field-programmable gate array,Real-time computing,Software,Hyperelliptic curve cryptography,Coprocessor,Clock rate,Embedded system,Reconfigurable computing
Conference
Volume
ISSN
ISBN
4934
0302-9743
3-540-78152-8
Citations 
PageRank 
References 
4
0.48
4
Authors
4
Name
Order
Citations
PageRank
Alexander Klimm1396.05
Oliver Sander2759.78
Jürgen Becker31894259.42
Sylvain Subileau440.48