Abstract | ||
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The paper describes the architecture, design, implementation, and test of a reconfigurable digital baseband processor for an RF-MIMO WLAN transceiver that performs the signal combining in the analogue domain. Description includes baseband algorithms (the main blocks being MIMO channel estimation and Tx-Rx analog beamforming), their FPGA-based implementation, a baseband PCB, and real-time tests. |
Year | DOI | Venue |
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2010 | 10.1109/ICECS.2010.5724633 | Electronics, Circuits, and Systems |
Keywords | Field | DocType |
MIMO communication,field programmable gate arrays,microprocessor chips,printed circuits,transceivers,wireless LAN,FPGA-based implementation,MIMO channel estimation,RF-MIMO WLAN transceiver,Tx-Rx analog beamforming,baseband PCB,multiple-input multiple-output wireless systems,real-time tests,reconfigurable digital baseband processor | Beamforming,Baseband,Transceiver,Computer science,MIMO,Field-programmable gate array,Baseband processor,Electronic engineering,Radio frequency,Line code | Conference |
ISBN | Citations | PageRank |
978-1-4244-8155-2 | 0 | 0.34 |
References | Authors | |
3 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Victor Elvira | 1 | 148 | 19.24 |
Jesús Ibáñez | 2 | 29 | 6.26 |
Ignacio Santamaría | 3 | 941 | 81.56 |
Milos Krstic | 4 | 170 | 39.42 |
Klaus Tittelbach-Helmrich | 5 | 43 | 7.35 |
Zoran Stamenkovic | 6 | 51 | 12.08 |