Abstract | ||
---|---|---|
This paper presents a reconfigurable architecture and associated design methodology for developing networking silicon chips. The tools include most of the common traffic QoS features and low level interfaces as well as some special features for extensible design. When coupled with the design tools, this architecture provides powerful capabilities for the design of highly flexible networking silicon IP cores. |
Year | DOI | Venue |
---|---|---|
2012 | 10.1109/IPDPSW.2012.35 | IPDPS Workshops |
Keywords | Field | DocType |
extensible design,logic circuits,interface processor,microprocessor chips,quality of service,networking,reconfigurable architectures,powerful capability,reconfigurable designs,design tool,traffic control,silicon,low level interface,special feature,design automation,design tool methodology,integrated circuit design,reconfigurable architecture,si,common traffic qos feature,flexible networking silicon ip,elemental semiconductors,networking silicon,highly flexible networking silicon ip core chip,traffic qos feature,networking silicon chip,associated design methodology,pipelines,generators | Logic gate,Architecture,Admission control,Computer science,Quality of service,Design methods,Integrated circuit design,Electronic design automation,Extensibility,Embedded system | Conference |
ISSN | ISBN | Citations |
2164-7062 | 978-1-4673-0974-5 | 1 |
PageRank | References | Authors |
0.36 | 9 | 7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Tao Li | 1 | 3 | 4.17 |
Zhentao Liu | 2 | 121 | 18.68 |
Huimin Du | 3 | 14 | 3.92 |
Lei Zhang | 4 | 31 | 5.43 |
Han Jungang | 5 | 25 | 9.03 |
Lin Jiang | 6 | 2 | 2.08 |
Qingang Dong | 7 | 1 | 0.36 |