Name
Abstract | ||
|---|---|---|
Relating to a previous simplified VHDL processor model [1], a more advanced synthesized VHDL pipeline microprocessor model was developed and has been used in the second term computer architecture course offered in the School of Electrical and Computer Engineering at the Georgia Institute of Techonology. This paper will first describe the pipeline processor model and its VHDL implementation. Then, it presents various implementation extensions that have been assigned and completed within a satisfactory period by participating students. |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/MSE.1999.787035 | MSE |
Keywords | Field | DocType |
pipeline processor model,vhdl implementation,computer engineering,advanced synthesized vhdl pipeline,various implementation extension,teaching pipelining,microprocessor model,vhdl processor model,term computer architecture course,satisfactory period,georgia institute,hardware description languages,electrical and computer engineering,decoding,computer architecture,computer science education,hardware description language,registers,concurrent computing,teaching | Pipeline (computing),Computer architecture,Programming language,Computer science,Concurrency,Microprocessor,Concurrent computing,Decoding methods,VHDL,Hardware design languages,Hardware description language | Conference |
ISBN | Citations | PageRank |
0-7695-0312-8 | 0 | 0.34 |
References | Authors | |
1 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tsai Chi Huang | 1 | 4 | 2.38 |
| Sudhakar Yalamanchili | 2 | 1836 | 184.95 |
| Roy W. Melton | 3 | 5 | 2.21 |
| Philip R. Bingham | 4 | 2 | 1.08 |
| Cecil O. Alford | 5 | 27 | 7.87 |