Title
A time division multiplexing (TDM) logic mapping method for computational applications
Abstract
This paper discusses a large number of logic circuit mapping methods for complex systems, focusing on network hardware system designs. This logic mapping technique enables significant logic simulation time savings by mapping identical logic processor modules. Under the logic mapping method which is called the time division multiplexing (TDM) logic mapping method, the speed of the required to simulate it is significantly reduced, compared with conventional mapping methods, when folding the identical modules into a single module copy is done at the hardware description language (HDL) level. In principle, this method can be applied to any type of a network design platform, e.g., communication data stream through physical channel (fiber optic line), video signal transfer logic display environment, etc. In this paper, we demonstrate this method using several configurations of the IBM Serial Link architecture.
Year
DOI
Venue
2007
10.1007/978-3-540-74472-6_91
ICCSA (1)
Keywords
Field
DocType
hardware description language,computational application,identical logic processor module,video signal transfer logic,identical module,logic mapping technique,significant logic simulation time,network design platform,time division multiplexing,conventional mapping method,logic mapping method,logic circuit mapping method,network design,system design,complex system,fiber optic
Logic synthesis,Digital electronics,Logic gate,Computer science,Logic optimization,Computer network,Real-time computing,Logic simulation,Register-transfer level,Logic family,Computer hardware,Programmable logic device
Conference
Volume
ISSN
ISBN
4705
0302-9743
3-540-74468-1
Citations 
PageRank 
References 
0
0.34
7
Authors
8
Name
Order
Citations
PageRank
Taikyeong Jeong16310.93
Jin-Suk Kang24415.03
Youngjun John300.34
Inhwa Choi400.34
Sungsoo Choi5165.02
Hyo-Sik Yang6535.81
Gyngleen Park700.34
Sehwan Yoo800.68