Paper Info
Title
Bridge floating-point fused multiply-add design
Abstract
A new floating-point fused multiply-add (FMA) design for the execution of (A × B)+C as a single instruction is presented. The bridge fused multiply-add unit is a design intended to add FMA functionality to existing floating-point coprocessor units by including specialized hardware that reuses floating-point adder and floating-point multiplier components. The bridge unit adds this functionality without requiring an overhaul of coprocessor control units and without degrading the performance or parallel execution of addition and multiplication single instructions. To evaluate the performance, area, and power costs of adding a bridge FMA unit to common floating-point execution blocks, several circuits including a double-precision floating-point adder, floating-point multiplier, classic FMA, and a bridge FMA unit have been designed and implemented with AMD 65-nm silicon-on-insulator technology to provide a realistic and fair analysis of the presented FMA hardware tradeoffs.
Year
DOI
Venue
2008
10.1109/TVLSI.2008.2001944
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
multiply-add design,fma functionality,fma hardware tradeoffs,floating-point coprocessor unit,new floating-point fused multiply-add,floating-point multiplier,bridge floating-point,bridge fma unit,double-precision floating-point adder,floating-point multiplier component,floating-point adder,common floating-point execution block,floating point,silicon on insulator,floating point arithmetic,fused multiply add,adders
Multiply–accumulate operation,Adder,Floating point,Computer science,Multiplier (economics),Electronic engineering,Multiplication,Control unit,Coprocessor,Computer hardware,Integrated circuit,Embedded system
Journal
Volume
Issue
ISSN
16
12
1063-8210
Citations 
PageRank 
References 
13
1.00
15
Authors
3
Name
Order
Citations
PageRank
Eric Quinnell1312.36
Earl E. Swartzlander28911.63
Carl Lemonds3394.53