Name
Abstract | ||
|---|---|---|
Dynamic binary translation (DBT) converts codes written for a source instruction set architecture (ISA) into optimized code for a target ISA. DBT has emerged as an important tool with real world applications. Interpretation is always adopted to handle the non-hotspot code in a two-stage DBT system. An important consideration in such DBT systems is the interpretation overhead. We investigate that repeated redecoding operations are the bottleneck of interpretation overhead. We propose interpreted code cache (Pcache), a hardware assist to save the information of the decoded instruction for reuse. We analyze and model Pcache performance via simulation on a DBT system simulator. Results from SPEC2000 integer benchmarks show that Pcache could significantly reduce redecoding operations and the overhead of interpretation in a DBT system. The speedup of interpretation is up to 17.12 on average with assist of Pcache. We also analyze the extra overhead caused by Pcache, which is neglectable compared to the performance gains. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/ISPA.2009.83 | 2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS, PROCEEDINGS |
Keywords | Field | DocType |
dynamic binary translation, interpretation, cache, simulator, SPEC2000 benchmark | Bottleneck,Computer science,Instruction set,Cache,Parallel computing,Real-time computing,Binary translation,Software,Decoding methods,Benchmark (computing),Distributed computing,Speedup | Conference |
Volume | Issue | Citations |
null | null | 4 |
PageRank | References | Authors |
0.75 | 10 | 5 |