Name
Abstract | ||
|---|---|---|
The paper describes the implementation of a massively parallel cellular architecture specifically designed for a number of tasks related to the physical verification and synthesis of integrated circuits. The machine has been designed to operate as a specialized coprocessor to be attached to a general purpose workstation and is based on a chip set, part designed as full custom components, part as standard cell and part implemented with programmable logic. The first prototype has 256 processing elements, arranged in a 16×16 matrix. |
Year | DOI | Venue |
|---|---|---|
1992 | 10.1016/0165-6074(92)90348-B | Microprocessing and Microprogramming |
DocType | Volume | Issue |
Journal | 35 | 1 |
ISSN | Citations | PageRank |
0165-6074 | 3 | 1.10 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| F. Gregoretti | 1 | 64 | 12.03 |
| L.M. Reyneri | 2 | 11 | 2.13 |
| Claudio Sansoè | 3 | 64 | 15.86 |
| L. Rigazio | 4 | 30 | 4.32 |