Title
Parallel buffers for chip multiprocessors
Abstract
Chip multiprocessors (CMPs) present new opportunities for improving database performance on large queries. Because CMPs often share execution, cache, or bandwidth resources among many hardware threads, implementing parallel database operators that efficiently share these resources is key to maximizing performance. A crucial aspect of this parallelism is managing concurrent, shared input and output to the parallel operators. In this paper we propose and evaluate a parallel buffer that enables intra-operator parallelism on CMPs by avoiding contention between hardware threads that need to concurrently read or write to the same buffer. The parallel buffer handles parallel input and output coordination as well as load balancing so individual operators do not need to reimplement that functionality.
Year
DOI
Venue
2007
10.1145/1363189.1363192
DaMoN
Keywords
Field
DocType
database performance,parallel database operator,intra-operator parallelism,parallel operator,chip multiprocessors,parallel buffer,shared input,parallel input,hardware thread,share execution,output coordination,load balance
Database tuning,Cache,Computer science,Parallel database,Load balancing (computing),Parallel computing,Real-time computing,Thread (computing),Input/output,Chip,Bandwidth (signal processing)
Conference
Citations 
PageRank 
References 
14
1.12
19
Authors
3
Name
Order
Citations
PageRank
John Cieslewicz133519.95
Kenneth A. Ross24110750.80
Ioannis Giannakakis3141.12