Name
Abstract | ||
|---|---|---|
The placement problem for structured ASICs combines aspects of the standard cell ASIC placement problem and FPGA placement. Similarities with ASIC placement include the number and size of the place-able objects and the need to consider buffering within placement. Similarities with FPGA placement include the existence of discrete legal locations for all types of objects, the constraints caused by "intrinsic" connections, such as clock, reset or IO signals and fixed routing tracks. The research community has provided detailed analysis of various different solutions for the standard cell placement problem over the last two decades. FPGA placement research has not focused on the legalization issues. Architecturally, FPGAs are changing to focus more on synthesis and clustering than fine-grained placement to meet timing. In this paper we discuss the similarities and differences between FPGA, Standard Cell, and Structured ASIC placement, and we present new representations and tests cases for the structured ASIC problem |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1145/1353629.1353650 | International Symposium on Physical Design |
Keywords | Field | DocType |
placement,asic placement,fpga placement research,standard cell asic placement,structured asics,fine-grained placement,placement challenge,structured asic placement,fpga placement,research community,structured asic problem,placement problem,standard cell placement problem,field programmable gate arrays,field programmable gate array | Mathematical optimization,Computer architecture,Computer science,Field-programmable gate array,Placement,Application-specific integrated circuit,Standard cell,Cluster analysis,Embedded system | Conference |
Citations | PageRank | References |
2 | 0.44 | 1 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Herman Schmit | 1 | 553 | 80.32 |
| Amit Gupta | 2 | 2 | 0.78 |
| Radu Ciobanu | 3 | 2 | 0.44 |