Name
Abstract | ||
|---|---|---|
Ability to stack separate chips in a single package enables three-dimensional integrated circuits (3D ICs). Heterogeneous 3D ICs provide even better opportunities to reduce the power and increase the performance per unit area. An important issue in designing a heterogeneous 3D IC is reliability. To achieve this, one needs to select the data mapping and processor layout carefully. This paper addresses this problem using an integer linear programming (ILP) approach. Specifically, on a heterogeneous 3D CMP, it explores how applications can be mapped onto 3D ICs to maximize reliability. Preliminary experiments indicate that the proposed technique generates promising results in both reliability and performance. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1007/s10836-013-5373-0 | J. Electronic Testing |
Keywords | Field | DocType |
Reliability,Multicore,3D,Data mapping | Computer architecture,Data mapping,Computer science,Real-time computing,Multiprocessing,Electronic engineering,Integer programming,Three-dimensional integrated circuit,Integrated circuit,Multi-core processor,Embedded system | Journal |
Volume | Issue | ISSN |
29 | 2 | 0923-8174 |
Citations | PageRank | References |
0 | 0.34 | 11 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ismail Akturk | 1 | 32 | 6.56 |
| Ozcan Ozturk | 2 | 1 | 1.03 |