Name
Abstract | ||
|---|---|---|
Implementations of SRAM cells in FinFET and carbon nanotube FET (CNTFET) technologies are presented in this paper. The International Technology Roadmap for Semiconductors has identified these technologies as likely candidates to replace bulk CMOS. Leakage current is one of the major contributors in the power consumption in SRAM arrays; FinFETs have been shown to greatly reduce leakage current. The FinFET memory cells are presented. These cells dissipate 0.49 µW of static power. The CNTFET memory requires 0.195 µW of static power. In current synthesis processes Metallic CNTs are grown along with semiconductor CNTs, a metallic tolerant scheme is used to overcome the presence of metallic CNT. This CNTFET memory with metallic tolerance dissipates 0.21 µW of static power. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/GREENCOMP.2010.5598266 | Green Computing Conference |
Keywords | Field | DocType |
cntfet technology,low power sram cell,static power,cntfet memory,metallic tolerance,current synthesis,metallic cnt,leakage current,power consumption,metallic cnts,finfet memory cell,metallic tolerant scheme,field effect transistors,low power electronics,nanoelectronics,carbon nanotube,carbon nanotubes | Nanoelectronics,Leakage (electronics),Static random-access memory,CMOS,International Technology Roadmap for Semiconductors,Carbon nanotube field-effect transistor,MOSFET,Materials science,Optoelectronics,Low-power electronics | Conference |
Citations | PageRank | References |
1 | 0.35 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jose G. Delgado-Frias | 1 | 23 | 8.75 |
| Zhe Zhang | 2 | 1 | 0.35 |
| Michael A. Turi | 3 | 11 | 3.77 |