Name
Abstract | ||
|---|---|---|
This paper presents parallel VerUog simulation architecture bases on optimistic asynchronous pardel simulation algorithm and MPI library, and proposes a novel emclent modnbbased partition algorithm combined with pre-slmulation partition algorithm. Wlth the presented architecture and partition algorithm, parallel VerUog simulation can get promising speedup, as well as distdbuted workload and communication cost across processors. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/ASPDAC.2004.1337671 | ASP-DAC |
Keywords | Field | DocType |
optimistic asynchronous,communication cost,parallel verilog simulation architecture,partition algorithm,promising speedup,parallel verilog simulation,pre-simulation partition algorithm,circuit partition,mpi library,parallel simulation algorithm,novel efficient module-based partition,algorithm design and analysis,canonical form,kernel,very large scale integration,logic synthesis | Logic synthesis,Kernel (linear algebra),Partition problem,Asynchronous communication,Algorithm design,Computer science,Parallel computing,Verilog,Very-large-scale integration,Speedup | Conference |
ISSN | ISBN | Citations |
2153-6961 | 0-7803-8175-0 | 1 |
PageRank | References | Authors |
0.42 | 3 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tun Li | 1 | 43 | 14.97 |
| Yang Guo | 2 | 16 | 4.18 |
| Sikun Li | 3 | 224 | 44.71 |
| Fujiang Ao | 4 | 17 | 4.79 |
| GongJie Li | 5 | 1 | 0.42 |