Title
Optimality of Bus-Invert Coding
Abstract
Dynamic power dissipation on I/O buses is an important issue for high-speed communication between chips. One can use coding techniques to reduce the number of transitions, which will reduce the dynamic power. Bus-invert coding is one popular technique for interchip buses, where the dominant contribution is from the self-capacitance of the wires. This algorithm uses an invert line to signal whether...
Year
DOI
Venue
2008
10.1109/TCSII.2008.2002564
IEEE Transactions on Circuits and Systems II: Express Briefs
Keywords
Field
DocType
Capacitance,Power dissipation,Viterbi algorithm,Hamming distance,Data buses,Wires,Greedy algorithms,Decoding,Equations
Computer science,Coding (social sciences),Electronic engineering,Greedy algorithm,Dynamic demand,Viterbi decoder,Hamming distance,Shannon–Fano coding,Viterbi algorithm,Encoding (memory)
Journal
Volume
Issue
ISSN
55
11
1549-7747
Citations 
PageRank 
References 
1
0.34
6
Authors
4
Name
Order
Citations
PageRank
Fakhrul Z. Rokhani1359.25
Wen-chih Kan251.50
John Kieffer3152.33
Gerald E. Sobelman422544.78