Abstract | ||
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This paper describes a technique to reliably and securely identify individual integrated circuits (ICs) based on the precise measurement of circuit delays and a simple challenge-response protocol. This technique could be used to produce key-cards that are more difficult to clone than ones involving digital keys on the IC. We consider potential venues of attack against our system, and present candidate implementations. Experiments on Field Programmable Gate Arrays show that the technique is viable, but that our current implementations could require some strengthening before it can be considered as secure. Copyright (C) 2004 John Wiley Sons, Ltd. |
Year | DOI | Venue |
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2004 | 10.1002/cpe.805 | CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE |
Keywords | Field | DocType |
authentication, identification, physical random function, physical security, smartcard, tamper resistance, unclonability | Authentication,Physical security,Computer science,Smart card,Tamper resistance,Integrated circuit,Embedded system,Distributed computing | Journal |
Volume | Issue | ISSN |
16 | 11 | 1532-0626 |
Citations | PageRank | References |
96 | 10.06 | 10 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Blaise Gassend | 1 | 1738 | 164.28 |
Daihyun Lim | 2 | 434 | 54.59 |
Dwaine Clarke | 3 | 1563 | 157.24 |
Marten Van Dijk | 4 | 2875 | 242.07 |
Srinivas Devadas | 5 | 8606 | 1146.30 |