Abstract | ||
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This paper presents a formal method for synthesizing multilayered regular processor arrays from algorithm specification. Multilayered array is a structure where 2-D sub-arrays are connected into 3-D array only by one edge and thus, fits, for example, ... |
Year | DOI | Venue |
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2000 | 10.1109/ICFEM.2000.873806 | ICFEM |
Keywords | Field | DocType |
formal treatment,formal method,multilayered array,multilayered regular processor array,2-d sub-arrays,algorithm specification,3-d array,fixed-point problems,graphs,hardware,application software,shortest path problem,logic,information analysis,algebra,fixed point,data flow analysis,object oriented languages,minimisation,minimization,data analysis,graph theory,fixed point arithmetic,protocols,formal methods | Graph theory,Algebraic specification,Shortest path problem,Fixed-point arithmetic,Computer science,Data-flow analysis,Theoretical computer science,Formal methods,Fixed point,Longest path problem | Conference |
ISBN | Citations | PageRank |
0-7695-0822-7 | 0 | 0.34 |
References | Authors | |
7 | 1 |
Name | Order | Citations | PageRank |
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Tetsuo Tamai | 1 | 334 | 33.27 |