Abstract | ||
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This article presents a novel approach to the high-level system verification problem based on a hybrid hardware/software virtual emulation tool. Unavailable components or sub-systems are physically replaced on a prototype board by FPGAs whose electrical behavior is driven by software simulations of high-level description models. Such a prototype can smoothly evolve towards the final system as soon as the unavailable parts or the components under manufacturing become available. The simultaneous use of prototyping techniques such as field-programmable circuit boards with software simulation significantly improve the usefulness of our framework. A low-cost verification environment, with multiprocessing and multilanguage capabilities currently in use at University of Bologna, is described. |
Year | DOI | Venue |
---|---|---|
1996 | 10.1109/IWRSP.1996.506732 | RSP |
Keywords | Field | DocType |
prototype board,high-level system verification problem,low-cost verification environment,final system,software simulation,unavailable part,sw system,high-level description model,upgradable approach,unavailable component,simultaneous use,software virtual emulation tool,fpgas,systems analysis,manufacturing,prototyping,emulation,hardware,prototypes,field programmable gate arrays,printed circuits,application specific integrated circuits,logic design,multiprocessing | Computer architecture,Computer science,Systems analysis,Field-programmable gate array,Software prototyping,Application-specific integrated circuit,Multiprocessing,Software,Emulation,Hardware emulation,Embedded system | Conference |
ISSN | ISBN | Citations |
1074-6005 | 0-8186-7603-5 | 2 |
PageRank | References | Authors |
0.62 | 0 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
M. Borgatti | 1 | 32 | 6.96 |
R. Rambaldi | 2 | 4 | 1.86 |
G. Gori | 3 | 2 | 0.62 |
R Guerrieri | 4 | 124 | 30.04 |