Name
Abstract | ||
|---|---|---|
In the past decade, software architecture research has mainly focused on the concept formulation and the development of various architecture description languages. This field has matured enough and thus requires more emphasis on validation techniques. Symbolic model checking has been a highly successful automatic validation technique for hardware systems. We are interested in whether symbolic model checking can be effectively applied to software architecture validation. In this paper, we present our approach to apply the symbolic model checking technique to verify software architecture specifications written in SAM. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1145/568760.568808 | SEKE |
Keywords | Field | DocType |
validation technique,temporal logic,software architecture specification,symbolic model checking technique,software architecture research,symbolic model checking,model checking,various architecture description language,petri nets,model checking software architecture,concept formulation,software architecture validation,software architecture,hardware system,successful automatic validation technique,architecture description language,petri net | Model checking,Programming language,Software design description,Computer science,Software architecture description,Software architecture,Reference architecture,Systems architecture,Software verification and validation,Symbolic trajectory evaluation | Conference |
ISBN | Citations | PageRank |
1-58113-556-4 | 13 | 0.63 |
References | Authors | |
10 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xudong He | 1 | 484 | 61.02 |
| Junhua Ding | 2 | 188 | 21.18 |
| Yi Deng | 3 | 57 | 3.97 |