Title
HW/SW Co-Design and Implementation of Multi-Standard Video Decoding
Abstract
In this paper, we present a design and implementation of multi-standard video decoder, which adopts the principle of HW/SW cooperation to achieve real time video decoding process. Based on the profiling of MPEG-1/2/4 video decoding algorithms, the computational intensive IDCT and sub-pixel interpolation are figured out to implement with hardware, and the dedicated DMA channels are provided to fulfil the high throughput of MC processing. The remained decoding functions are realized with software based on a RISC CPU. The design shares the advantage of high flexibility to fulfil multi-standard processing. With the assistant hardware accelerating, the proposed video decoder can achieve the MPEG-1/2/4 D1 size (720times480) video decoding at 30 fps
Year
DOI
Venue
2006
10.1109/ESTMED.2006.321279
ESTIMedia
Keywords
Field
DocType
real time,high throughput,hardware accelerator
Computer science,Profiling (computer programming),Interpolation,Communication channel,Real-time computing,Software,Decoding methods,Throughput,Computer hardware,Data compression,Video decoder
Conference
Volume
Issue
ISBN
null
null
0-7803-9783-5
Citations 
PageRank 
References 
6
0.62
5
Authors
4
Name
Order
Citations
PageRank
Feng Liu191.08
Guo Rui260.62
Shu Shi320416.62
Xu Cheng422028.62