Paper Info
Title
A vector and array multiprocessor extension of the sylvan architecture
Abstract
The main intent of this paper will be the description of a multiprocessor system that uses microprogrammed hardware to support operating system primitives that contribute to its high performance vector processing capability. The system consists of nodes that communicate over a system interconnect. Each node is a tripartite subsystem that consists of a host processor complex running application code, a vector co-processor and a kernel support processor that handles both operating system functions and control of the vector co-processor. The microcoded kernel processor is used to support a message based operating system that allows concurrent processes to communicate while residing in the same node or in different nodes. Since the kernel processor controls the functioning of the vector co-processor as well as the management of processes (for example, context switching), the node can utilize the resources of the co-processor very effectively.
Year
DOI
Venue
1984
10.1145/800015.808160
ISCA
Keywords
Field
DocType
operating system,process capability
Kernel (linear algebra),Architecture,Computer architecture,Computer science,Parallel computing,Real-time computing,Multiprocessing,Host processor,Process management (computing),Vector processor,Interconnection,Context switch
Conference
Volume
Issue
ISSN
12
3
0163-5964
ISBN
Citations 
PageRank 
0-8186-0538-3
3
0.57
References 
Authors
4
1
Name
Order
Citations
PageRank
F. J. Burkowski125588.69