Paper Info
Title
A cache-aware scheduling algorithm for embedded systems
Abstract
The paper presents a methodology for scheduling real time tasks in embedded systems where the task layout is known at design time and does not change at execution time (static systems) and where the cache miss costs are significant when compared to the normal execution time of the tasks. The scheduling model assumes a time driven dispatching of the application tasks which are ordered in a pre defined sequence. Building such a sequence in a way that is not only efficient but accounts for optimal cache sequencing is the aim of our method. The refinement of the schedule towards an optimal solution is done by simulated annealing techniques. The evaluation of the schedules is done by considering the effects of instruction caching when evaluating the computation time of the tasks.
Year
DOI
Venue
1997
10.1109/REAL.1997.641282
RTSS
Keywords
Field
DocType
application task,cache-aware scheduling algorithm,real time task,execution time,optimal solution,computation time,optimal cache sequencing,design time,embedded system,scheduling model,normal execution time,real time systems,scheduling,instruction sets,simulated annealing,real time,scheduling algorithm
Instruction set,Computer science,Cache,Scheduling (computing),Real-time computing,Distributed computing,Computation,Simulated annealing,Parallel computing,Schedule,Execution time,Cache miss,Embedded system
Conference
ISSN
ISBN
Citations 
1052-8725
0-8186-8268-X
2
PageRank 
References 
Authors
0.42
8
2
Name
Order
Citations
PageRank
G. Luculli130.82
M. Di Natale2345.98