Title
Overview of complementary GaAs technology for high-speed VLSI circuits
Abstract
A self-aligned complementary GaAs (CGaAs) technology (developed at Motorola) for low-power, portable, digital and mixed-mode circuits is being extended to address high-speed VLSI circuit applications. The process supports full complementary, unipolar (pseudo-DCFL), source-coupled, and dynamic (domino) logic families. Though this technology is not yet mature, it is years ahead of CMOS in terms of fast gate delays at low power supply voltages. Complementary circuits operating at 0.9V have demonstrated power-delay products of 0.01 µW/MHz/gate. Propagation delays of unipolar circuits are as low as 25 ps. Logic families can be mixed on a chip to trade power for delay. CGaAs is being evaluated for VLSI applications through the design of a PowerPC-architecture microprocessor.
Year
DOI
Venue
1998
10.1109/92.661245
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
unipolar circuit,self-aligned complementary gaas,low power supply voltage,complementary circuit,high-speed vlsi circuit application,logic family,powerpc-architecture microprocessor,propagation delay,vlsi application,complementary gaas technology,fast gate delay,vlsi,frequency,very large scale integration,circuits,cmos technology,gallium arsenide,powerpc,gaas,indexing terms,gold,chip
Logic gate,Power–delay product,Computer science,Microprocessor,CMOS,Electronic engineering,Logic family,Electronic circuit,Very-large-scale integration,Integrated circuit,Electrical engineering
Journal
Volume
Issue
ISSN
6
1
1063-8210
Citations 
PageRank 
References 
2
0.60
1
Authors
15