Abstract | ||
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This paper describes a new compression function, MAME designed for hardware-oriented hash functions which can be used in applications with reduced hardware requirements. MAME takes a 256-bit message block and a 256-bit chaining variable as input and produces a 256-bit output. In the light of recent attacks on MD5 and SHA-1, our design strategy is very conservative, and we show that our compression function is secure against various kinds of widely known attacks with very large security margins. The simple logical operations and the hardware efficient S-boxes are used to achieve a hardware implementation of MAME requiring only 8.1 Kgates on 0.18 μmtechnology. |
Year | DOI | Venue |
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2007 | 10.1007/978-3-540-74735-2_11 | CHES |
Keywords | Field | DocType |
new compression function,design strategy,compression function,256-bit output,hardware implementation,hardware-oriented hash function,256-bit chaining variable,hardware efficient s-boxes,reduced hardware requirements,reduced hardware requirement,256-bit message block,hash function | Chaining,Design strategy,Logical operations,Computer science,Cryptographic hash function,Parallel computing,Theoretical computer science,Hash function,Computer hardware,MD5 | Conference |
Volume | ISSN | Citations |
4727 | 0302-9743 | 14 |
PageRank | References | Authors |
0.87 | 23 | 7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Hirotaka Yoshida | 1 | 54 | 9.70 |
Dai Watanabe | 2 | 54 | 4.87 |
Katsuyuki Okeya | 3 | 447 | 38.47 |
Jun Kitahara | 4 | 17 | 1.25 |
Hongjun Wu | 5 | 68 | 6.88 |
Özgül Küçük | 6 | 46 | 2.78 |
Bart Preneel | 7 | 6249 | 695.32 |