Title
Logic Circuit Synthesis Using Prolog
Abstract
This paper briefly reviews the current use of CAD in logic design, and then describes an expert system used to synthesize logic circuits. Specialized knowledge dealing with standard TTL ICs is written in Prolog and AGE, and the results are compared.
Year
DOI
Venue
1983
10.1007/BF03037425
New Generation Comput.
Keywords
Field
DocType
expert system,logic design
Logic synthesis,Logic gate,Digital electronics,Programming language,Logic optimization,Computer science,Expert system,Theoretical computer science,Prolog,Logic family,Register-transfer level
Journal
Volume
Issue
ISSN
1
2
1882-7055
Citations 
PageRank 
References 
5
1.63
3
Authors
2
Name
Order
Citations
PageRank
Takao Uehara14833.66
Nobuaki Kawato210579.03