Title
NoC Topologies Exploration based on Mapping and Simulation Models
Abstract
NoC architectures are considered the next generation of communication infrastructure for future systems-onchip. Selection of the network architecture and mapping of IP nodes onto the NoC topology are two important research topics. In this paper we compare well known NoC interconnect systems, specifically, Ring, 2d-Mesh, Spidergon and unbuffered Crossbar using theoretical uniform traffic based on the request/reply paradigm as well as a realistic traffic based on a Mpeg4 application. The IP mapping is computed by the SCOTCH partitioning tool opportunely modified to maximize selected embedding quality criteria under multiple topological constraints.
Year
DOI
Venue
2007
10.1109/DSD.2007.77
DSD
Keywords
Field
DocType
simulation model,system on chip,network on chip
Embedding,Computer science,Network on a chip,Network architecture,Network topology,Real-time computing,Simulation modeling,Chip,Interconnection,Crossbar switch
Conference
ISBN
Citations 
PageRank 
0-7695-2978-X
21
0.91
References 
Authors
14
5
Name
Order
Citations
PageRank
Luciano Bononi198583.92
Nicola Concer21648.90
Miltos D. Grammatikakis314018.06
Marcello Coppola417522.11
R. Locatelli5897.98