Title
Spatial Feature Based Video Scaling Scheme And Its Fpga Implementation For Video Standards Conversion
Abstract
In many digital image/video processing applications resolution enhancement naturally arises as a problem of high practical value. Typically, increasing spatial resolution through modifications in the imaging system is not a feasible option, and post-processmig algorithms designed to enhance resolution of the acquired image/video signal prove beneficial. In this work, we analyze recent work on pixel classification based resolution enhancement, namely, resolution synthesis, and discuss its applicability to low complexity customer grade display systems. In the light of our observations, we point out certain short-comings of resolution synthesis, and propose a modified scheme to improve its performance under certain conditions. We present an FPGA implementation of the proposed algorithm, and provide a computational complexity analysis. The resulting hardware design is tested for a standards conversion application where 480 x 720 progressive frames are scaled to 720 x 1280 progressive at 60 frames per second.
Year
DOI
Venue
2007
10.1109/SIPS.2007.4387556
2007 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS, VOLS 1 AND 2
Keywords
Field
DocType
resolution enhancement, FPGA implementation, scaling, resolution synthesis, standards conversion.
Computer science,Digital image,Real-time computing,Artificial intelligence,Computer engineering,Scaling,Computer vision,Video processing,Algorithm design,Field-programmable gate array,Frame rate,Image resolution,Computational complexity theory
Conference
ISSN
Citations 
PageRank 
1520-6130
1
0.42
References 
Authors
4
5
Name
Order
Citations
PageRank
Baris Uyar110.42
Murat Sayinta240.85
Toygar Akgun3909.39
Bülent Örencik411.09
Yucel Altunbasak51507116.78