Abstract | ||
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The focus of this paper is on the minimization of the variation in power consumed by a VLIW processor during the execution of a target program through instruction scheduling. The problem is formulated as a mixed-integer program (MIP) and a problem-specific branch-and-bound algorithm has been developed to solve it more efficiently than generic MIP solvers. Simulation results based on the TMS320C6711 VLIW digital signal processor using benchmarks from Mediabench and Trimaran showed that over 40% average reduction in power variation can be achieved without sacrificing execution speed of these benchmarks. Computational requirements and convergence rates of our algorithm are also analyzed. |
Year | DOI | Venue |
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2007 | 10.1145/1275937.1275942 | TACO |
Keywords | Field | DocType |
vliw processors,generic mip solvers,power variation reduction,vliw digital signal processor,average reduction,mixed-integer program,target program,vliw instruction scheduling,minimal power variation,computational requirement,power variation,vliw processor,instruction scheduling,execution speed,problem-specific branch-and-bound algorithm,digital signal processor,branch and bound algorithm,convergence rate | Convergence (routing),Instruction scheduling,Computer science,Very long instruction word,Digital signal processor,Parallel computing,Real-time computing,Minification | Journal |
Volume | Issue | ISSN |
4 | 3 | 1544-3566 |
Citations | PageRank | References |
2 | 0.36 | 27 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Shu Xiao | 1 | 40 | 13.46 |
Edmund M. -K. Lai | 2 | 55 | 5.44 |