Title
A family of network topologies with multiple loops and logarithmic diameter
Abstract
A new family of network topologies containing multiple loops is discussed in this paper. In the proposed structure, N processors are interconnected to form a graph G(m, N), m = 3, where m is a parameter of the graph such that N is an even multiple of m and (m - 1) x 2[(^m^-^ ^l^)^/^2]+
Year
DOI
Venue
1997
10.1016/S0167-8191(97)00067-7
Parallel Computing
Keywords
Field
DocType
redundant binary representation,diameter,new family,n processor,multiple loop,logarithmic diameter,routing,network topology,descend algorithms,graph g,ascend,proposed structure,ascend and descend algorithms,point to point,upper bound
Graph,Combinatorics,Hamiltonian (quantum mechanics),Network topology,Logarithm,Mathematics,Routing algorithm,Bounded function,Redundant binary representation
Journal
Volume
Issue
ISSN
22
14
Parallel Computing
Citations 
PageRank 
References 
1
0.44
8
Authors
4
Name
Order
Citations
PageRank
Srabani Sen Gupta181.32
Rajib K. Das2358.94
Krishnendu Mukhopadhyaya314721.08
Bhabani P. Sinha446455.72