Paper Info
Title
Post-linearization with image rejection for high IIP3 and image-rejection ratio of a 17 GHz CMOS low noise amplifier
Abstract
This study develops a post-linearization technique to simultaneously improve the input third-order intercept point (IIP3) and image-rejection ratio (IRR) of a 17GHz low noise amplifier (LNA) in a 0.18μm standard CMOS process. A third-order intermodulation distortion (IMD3) compensator constructed by a second-order notch filter was proposed to achieve both high linearity and image reject (IR) of the cascode LNA. The correlation between the post-linearization and IR techniques is analyzed and discussed. The measured LNA achieved a gain of 16.5dB, a noise figure (NF) of 4.58dB, an IIP3 of 0dBm, and an IRR from 68 to 78dB. The improvements of IIP3 and IRR are 11.7 and 46dB, respectively, better than that of the LNA without the notch filter. The proposed IR LNA with total current dissipation of 4.8mA under 1.8V supply voltage and notch filter only dissipate a DC power of 2mW.
Year
DOI
Venue
2010
10.1016/j.mejo.2010.06.017
Microelectronics Journal
Keywords
DocType
Volume
Integrated active notch filter,IMD3 compensator,Image-rejection ratio,Post-linearization,Low noise amplifier,CMOS
Journal
41
Issue
ISSN
Citations 
8
0026-2692
0
PageRank 
References 
Authors
0.34
0
2
Name
Order
Citations
PageRank
Hwann-kaeo Chiou1256.96
Tsung-yu Yang202.03