Title
Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures
Abstract
Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has shown one of its main deficiencies, when applied to solving real world applications, to be scalability. In the past few years several techniques have been proposed to avoid and/or solve this problem. Generalized disjunction decomposition (GDD) is one of these proposed methods. GDD was successful for the evolution of large combinational logic circuits based on a FPGA structure when used together with bi-directional incremental evolution and with (1+lambda) evolution strategy. In this paper a modified generalized disjunction decomposition, together with a recently introduced multi-population genetic algorithm, are implemented and tested for its scalability for solving large combinational logic circuits based on programmable logic array (PLA) structures
Year
DOI
Venue
2006
10.1109/AHS.2006.47
Istanbul
Keywords
Field
DocType
generalized disjunction decomposition,programmable logic array structures,evolvable hardware,evolution strategy,bi-directional incremental evolution,multi-population genetic algorithm,evolutionary algorithm,modified generalized disjunction decomposition,circuit configuration,large combinational logic circuit,electronic circuits,scalability,logic design,evolutionary computation,programmable logic array,population genetics,combinational circuits,field programmable gate arrays,genetic algorithms,hardware
Logic synthesis,Sequential logic,Evolutionary algorithm,Computer science,Parallel computing,Programmable logic array,Field-programmable gate array,Combinational logic,Evolvable hardware,Evolution strategy
Conference
ISBN
Citations 
PageRank 
0-7695-2614-4
5
0.46
References 
Authors
18
3
Name
Order
Citations
PageRank
Emanuele Stomeo1633.25
Tatiana Kalganova219515.96
Cyrille Lambert3633.25