Name
Abstract | ||
|---|---|---|
In this paper, a new method for evolving simple electronic circuits is discussed, with the aim of improving the reliability and performance of basic circuit blocks. Next-generation CMOS device models will be used in the simulation of circuits. Circuits are mapped to a grid layout which reflects the appearance of conventional schematic blocks. The performance of the system at designing passive low-pass filters is discussed, with an outline given of the intended future steps, towards the goal of integrating sub 100 nm MOSFET models into the circuits. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1145/1274000.1274014 | GECCO (Companion) |
Keywords | Field | DocType |
conventional schematic block,basic circuit block,nm mosfet model,passive low-pass filter,next-generation cmos device model,simple electronic circuit,grid layout,next-generation electronic circuit,new method,intended future step,evolutionary platform,algorithms,low pass filter,circuit design,genetic algorithms,genetic programming,cmos,genetic algorithm | Computer science,Real-time computing,Genetic programming,Schematic,Electronic engineering,Artificial intelligence,MOSFET,Genetic algorithm,Spice,CMOS,Electronic circuit,Grid,Machine learning | Conference |
Citations | PageRank | References |
1 | 0.37 | 9 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| James A. Hilder | 1 | 59 | 6.98 |
| Andy M. Tyrrell | 2 | 629 | 73.61 |