Name
Abstract | ||
|---|---|---|
Soft errors are an important challenge in contemporary microprocessors. Particle hits on the components of a processor are expected to create an increasing number of transient errors with each new microprocessor generation. In this paper we propose simple mechanisms that effectively reduce the vulnerability to soft errors in a processor. Our designs are generally motivated by the fact that many of the produced and consumed values in the processors are narrow and their upper order bits are meaningless. Soft errors caused by any particle strike to these higher order bits can be avoided by simply identifying these narrow values. Alternatively, soft errors can be detected or corrected on the narrow values by replicating the vulnerable portion of the value inside the storage space provided for the upper order bits of these operands. We offer a variety of schemes that make use of narrow values and analyze their efficiency in reducing soft error vulnerability of level-0 data cache of the processor. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/L-CA.2006.12 | Computer Architecture Letters |
Keywords | Field | DocType |
higher order bit,narrow value,exploiting narrow values,increasing number,important challenge,upper order bit,particle strike,contemporary microprocessors,soft error vulnerability,soft error tolerance,soft error,particle hit,error correction,higher order,error detection | Multithreading,Soft error,System recovery,Computer science,Microprocessor,Parallel computing,Operand,Error detection and correction,Real-time computing,Process design,Data cache | Journal |
Volume | Issue | ISSN |
5 | 2 | 1556-6056 |
Citations | PageRank | References |
25 | 0.93 | 9 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Oguz Ergin | 1 | 424 | 25.84 |
| Osman Unsal | 2 | 164 | 14.33 |
| Xavier Vera | 3 | 552 | 30.31 |
| Antonio González | 4 | 3178 | 229.66 |