Name
Title | ||
|---|---|---|
Instruction level redundant number computations for fast data intensive processing in asynchronous processors |
Abstract | ||
|---|---|---|
Instruction level parallelism (ILP) is strictly limited by various dependencies. In particular, data dependency is a major performance bottleneck of data intensive applications. In this paper we address acceleration of the execution of instruction codes serialized by data dependencies. We propose a new computer architecture supporting a redundant number computation at the instruction level. To design and implement the scheme, an extended data-path and additional instructions are also proposed. The architectural exploitation of instruction level redundant number computations (IL-RNC) makes it possible to eliminate carry propagations. As a result execution of instructions which are serialized due to inherent data dependencies is accelerated. Simulations have been performed with data intensive processing benchmarks and the proposed architecture shows about a 1.2-1.35 fold speedup over a conventional counterpart. The proposed architecture model can be used effectively for data intensive processing in a microprocessor, a digital signal processor and a multimedia processor. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1016/j.sysarc.2004.09.005 | Journal of Systems Architecture |
Keywords | Field | DocType |
data intensive processing benchmarks,microprocessor architecture,instruction level,inherent data dependency,asynchronous processor,data intensive application,data intensive processing,data dependency,redundant number computation,instruction level redundant number,additional instruction,instruction code,asynchronous circuits,instruction level parallelism,fast data,asynchronous circuit,digital signal processor,computer architecture | Instruction-level parallelism,Asynchronous communication,Bottleneck,Data dependency,Computer science,Digital signal processor,Parallel computing,Microprocessor,Transport triggered architecture,Real-time computing,Speedup | Journal |
Volume | Issue | ISSN |
51 | 3 | Journal of Systems Architecture |
Citations | PageRank | References |
0 | 0.34 | 12 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jeong-Gun Lee | 1 | 72 | 18.27 |
| Euiseok Kim | 2 | 46 | 10.09 |
| Dongik Lee | 3 | 77 | 14.46 |