Paper Info
Title
Multiaccess memory system for attached SIMD computer
Abstract
In order to reduce the memory access time for a Single-Instruction Multiple-Data stream (SIMD) computer with pq processing elements attached to a host computer, a multiaccess memory system is proposed. The proposed memory system supports simultaneous access to pq data elements within a 4-directional block (p × q), a row (1 × pq), a column (pq × 1), a forward-diagonal, and a backward-diagonal subarray with a constant interval in an arbitrary position in an M × N array of data elements, where the number of memory modules, m, is a prime number greater than pq. For the simple and fast address calculation and routing circuit, the address differences between the pq addresses and the base address are arranged in ascending order according to the index numbers of m memory modules from the index number of memory module of the first element. The proposed multiaccess memory system provides more subarray types and more constant intervals than the previous memory systems.
Year
DOI
Venue
2004
10.1109/TC.2004.1268401
IEEE Trans. Computers
Keywords
Field
DocType
memory module,parallel processing,memory address calculation,previous memory system,constant interval,simd computer,conflict-free memory system,network routing,data element,prime memory system,routing circuit,storage allocation,m memory module,multi-access systems,proposed memory system,multiaccess memory system,memory access time,index number,attached simd computer,proposed multiaccess memory system,single-instruction multiple-data stream,routing,single instruction multiple data,information retrieval,circuits,registers,prime number
Registered memory,Prime number,Access time,Computer science,Parallel computing,SIMD,Host (network),Real-time computing,Simd computer,Base address,Memory module
Journal
Volume
Issue
ISSN
53
4
0018-9340
Citations 
PageRank 
References 
8
0.66
29
Authors
1
Name
Order
Citations
PageRank
Jong Won Park1749.56