Name
Abstract | ||
|---|---|---|
This paper discusses a new method of bit synchronization derived from an analog theory to solve the problems involved in receiving a serial train of bits from a remote data communication source. Test results show that accurate frequency and phase information can be derived from the received serial data. The Analog Derived Clock to accomplish this bit synchronization is described, and applications in two-wire (half duplex operation) and four-wire (full duplex operation) communication systems are discussed. Speeds up to 2 Mc/sec using existing digital circuit technology were achieved. The special advantage of the Analog Derived Clock over present clocking techniques is an increase in speed and a reduction in circuitry. |
Year | DOI | Venue |
|---|---|---|
1964 | 10.1147/rd.83.0318 | IBM Journal of Research and Development |
Keywords | Field | DocType |
accurate frequency,duplex operation,bit synchronization,remote data communication source,communication system,analog theory,serial train,full duplex operation,serial data,analog derived clock,new digital method | Serial communication,Digital electronics,Synchronization,Analog device,Computer science,Communications system,Real-time computing,Electronic engineering,Bit error rate,Duplex (telecommunications),Self-clocking signal | Journal |
Volume | Issue | ISSN |
8 | 3 | 0018-8646 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| A. J. Anello | 1 | 0 | 0.34 |
| A. C. Ruocchio | 2 | 0 | 0.34 |
| W. D. Van Gieson | 3 | 0 | 0.34 |