Abstract | ||
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Automatic pattern search in event traces is a powerful method to identify performance problems in parallel applications. We demonstrate that knowledge about the virtual topology, which defines logical adjacency relationships between processes, can be exploited to explain the occurrence of inefficiency patterns in terms of the parallelization strategy used in an application. We show correlations between higher-level events related to a parallel wavefront scheme and wait states identified by our pattern analysis. In addition, we visually expose relationships between pattern occurrences and the topological characteristics of the affected processes. |
Year | DOI | Venue |
---|---|---|
2005 | 10.1109/ICPP.2005.21 | ICPP |
Keywords | DocType | ISSN |
affected process,event trace,logical adjacency relationship,parallel wavefront scheme,Communication Patterns,higher-level event,parallel application,Automatic Experimental Analysis,inefficiency pattern,Virtual Topologies,pattern occurrence,pattern analysis,automatic pattern search | Conference | 0190-3918 |
ISBN | Citations | PageRank |
0-7695-2380-3 | 1 | 0.35 |
References | Authors | |
0 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Fengguang Song | 1 | 232 | 19.88 |
Felix Wolf | 2 | 1264 | 107.97 |
Jack J. Dongarra | 3 | 17625 | 2615.79 |
Bernd Mohr | 4 | 147 | 17.80 |