Title
An interactive diagnostic/debugging subsystem for bit-slice processors.
Abstract
This paper discusses the design and implementation of a debugging/diagnostic subsystem for a bit-slice processor. The subsystem uses serial shadow registers under the control of a single chip microcomputer both to observe and to control processor behavior. Serial lines link the microcomputer to a diagnostic host which provides the user with a comprehensive set of interactive diagnostic commands. Using these commands, the user is able to load the writable control store, verify its contents, load mapping facilities, set breakpoints and examine registers during single-stepping sequences. The subsystem can considerably speed up the firmware development process and when incorporated into the design as a permanent feature, it provides a very low-cost facility for register-level diagnostics during the life of the system. Portability of the diagnostic subsystem across a number of processors is also possible and is conducive to the efficient management of machine diagnosis in the field.
Year
DOI
Venue
1985
10.1145/18927.18910
MICRO
Keywords
Field
DocType
serial shadow register,processor behavior,interactive diagnostic command,writable control store,bit-slice processor,debugging subsystem,serial line,comprehensive set,diagnostic subsystem,diagnostic host,load mapping facility,development process,chip
Bit slicing,Computer science,Chip,Real-time computing,Control store,Software portability,Computer hardware,Microcomputer,Embedded system,Debugging,Speedup,Firmware
Conference
Volume
Issue
ISBN
16
4
0-89791-172-5
Citations 
PageRank 
References 
1
0.43
1
Authors
1
Name
Order
Citations
PageRank
F. J. Burkowski125588.69