Paper Info
Title
A shortest path adaptive routing technique for minimizing path collisions in hybrid optical network-on-chip
Abstract
Hybrid optical network-on-chip (HONoC) is a promising alternative to all-electrical NoC whose capability in the performance and the power consumption is facing ultimate physical limitation. However, the latency unfairness problem and the associated performance degradation due to the circuit switched characteristic of HONoC must be resolved. In this paper, we propose a new shortest path adaptive routing technique for HONoC by exploiting an elaborate rollback scheme and a rapid flow control method to promote the fast routing path setup and the parallel data transfers. Compared to existing works, experimental results show reduction by 41.6% in latency and improvement by 16.9% in throughput with negligible extra energy consumption. Additional benefits in the network resource utilization and the performance under increasing network sizes are also analyzed.
Year
DOI
Venue
2013
10.1016/j.sysarc.2013.08.017
Journal of Systems Architecture - Embedded Systems Design
Keywords
Field
DocType
new shortest path adaptive,network size,associated performance degradation,latency unfairness problem,negligible extra energy consumption,elaborate rollback scheme,network resource utilization,fast routing path setup,power consumption,additional benefit,path collision,hybrid optical network-on-chip,circuit switching,network on chip,routing,flow control,system on chip
Equal-cost multi-path routing,Link-state routing protocol,Shortest path problem,Static routing,Computer science,Path vector protocol,Parallel computing,Network on a chip,Constrained Shortest Path First,Real-time computing,Private Network-to-Network Interface,Distributed computing
Journal
Volume
Issue
ISSN
59
10
1383-7621
Citations 
PageRank 
References 
0
0.34
18
Authors
4
Name
Order
Citations
PageRank
Jae Hoon Lee117637.92
Seok Young Kim222.38
Chang Lin Li310.69
Tae Hee Han4146.91